[PATCH] D82727: [PowerPC] Implement Vector Expand Mask builtins in LLVM/Clang

[Amy Kwan via Phabricator via llvm-commits]

amyk added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:881
+                                     [(set v16i8:$vD, (int_ppc_altivec_vexpandbm
+					   v16i8:$vB))]>;
   def VEXPANDHM : VXForm_RD5_XO5_RS5<1602, 1, (outs vrrc:$vD), (ins vrrc:$vB),
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I have no idea why this indentation is off, since it did not appear like that previously. In any case, I can address this during the commit if it is OK.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82727/new/

https://reviews.llvm.org/D82727