[PATCH] D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs.

[Denis Antrushin via Phabricator via llvm-commits]

dantrushin updated this revision to Diff 282697.
dantrushin added a comment.

- Mark MMOs for gc register spill slots as load/store ones;
- Add assert that there is only one EHPad;


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81647/new/

https://reviews.llvm.org/D81647

Files:
  llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
  llvm/test/CodeGen/X86/statepoint-fixup-call.mir
  llvm/test/CodeGen/X86/statepoint-fixup-invoke.mir
  llvm/test/CodeGen/X86/statepoint-fixup-shared-ehpad.mir
  llvm/test/CodeGen/X86/statepoint-vreg.ll
  llvm/test/CodeGen/X86/statepoint-vreg.mir

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