[PATCH] D85101: [AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported
Diogo N. Sampaio via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 3 02:04:24 PDT 2020
dnsampaio added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:1045
+ setOperationAction(ISD::SREM, VT, Expand);
+ setOperationAction(ISD::FREM, VT, Expand);
+ }
----------------
dmgreen wrote:
> Why not leave these as expand?
And they are integers as well, no? Perhaps the correct tests we want here is `!VT.isFloatingPoint()` or alike?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D85101/new/
https://reviews.llvm.org/D85101
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