[llvm] d620a6f - [VectorCombine] add tests for non-zero gep offsets; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Sat Aug 1 07:18:47 PDT 2020
Author: Sanjay Patel
Date: 2020-08-01T10:18:37-04:00
New Revision: d620a6fe98f74d9b305a0d45d4c6804b0e46bf6c
URL: https://github.com/llvm/llvm-project/commit/d620a6fe98f74d9b305a0d45d4c6804b0e46bf6c
DIFF: https://github.com/llvm/llvm-project/commit/d620a6fe98f74d9b305a0d45d4c6804b0e46bf6c.diff
LOG: [VectorCombine] add tests for non-zero gep offsets; NFC
Added:
Modified:
llvm/test/Transforms/VectorCombine/X86/load.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/VectorCombine/X86/load.ll b/llvm/test/Transforms/VectorCombine/X86/load.ll
index d560f671cfc0..4d8f3e5cd0ee 100644
--- a/llvm/test/Transforms/VectorCombine/X86/load.ll
+++ b/llvm/test/Transforms/VectorCombine/X86/load.ll
@@ -55,8 +55,8 @@ define float @matching_fp_vector(<4 x float>* align 16 dereferenceable(16) %p) {
ret float %r
}
-define float @matching_fp_vector_gep0(<4 x float>* align 16 dereferenceable(16) %p) {
-; CHECK-LABEL: @matching_fp_vector_gep0(
+define float @matching_fp_vector_gep00(<4 x float>* align 16 dereferenceable(16) %p) {
+; CHECK-LABEL: @matching_fp_vector_gep00(
; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds <4 x float>, <4 x float>* [[P:%.*]], i64 0, i64 0
; CHECK-NEXT: [[R:%.*]] = load float, float* [[GEP]], align 16
; CHECK-NEXT: ret float [[R]]
@@ -66,6 +66,50 @@ define float @matching_fp_vector_gep0(<4 x float>* align 16 dereferenceable(16)
ret float %r
}
+define float @matching_fp_vector_gep01(<4 x float>* align 16 dereferenceable(20) %p) {
+; CHECK-LABEL: @matching_fp_vector_gep01(
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds <4 x float>, <4 x float>* [[P:%.*]], i64 0, i64 1
+; CHECK-NEXT: [[R:%.*]] = load float, float* [[GEP]], align 4
+; CHECK-NEXT: ret float [[R]]
+;
+ %gep = getelementptr inbounds <4 x float>, <4 x float>* %p, i64 0, i64 1
+ %r = load float, float* %gep, align 4
+ ret float %r
+}
+
+define float @matching_fp_vector_gep01_deref(<4 x float>* align 16 dereferenceable(19) %p) {
+; CHECK-LABEL: @matching_fp_vector_gep01_deref(
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds <4 x float>, <4 x float>* [[P:%.*]], i64 0, i64 1
+; CHECK-NEXT: [[R:%.*]] = load float, float* [[GEP]], align 4
+; CHECK-NEXT: ret float [[R]]
+;
+ %gep = getelementptr inbounds <4 x float>, <4 x float>* %p, i64 0, i64 1
+ %r = load float, float* %gep, align 4
+ ret float %r
+}
+
+define float @matching_fp_vector_gep10(<4 x float>* align 16 dereferenceable(32) %p) {
+; CHECK-LABEL: @matching_fp_vector_gep10(
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds <4 x float>, <4 x float>* [[P:%.*]], i64 1, i64 0
+; CHECK-NEXT: [[R:%.*]] = load float, float* [[GEP]], align 16
+; CHECK-NEXT: ret float [[R]]
+;
+ %gep = getelementptr inbounds <4 x float>, <4 x float>* %p, i64 1, i64 0
+ %r = load float, float* %gep, align 16
+ ret float %r
+}
+
+define float @matching_fp_vector_gep10_deref(<4 x float>* align 16 dereferenceable(31) %p) {
+; CHECK-LABEL: @matching_fp_vector_gep10_deref(
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds <4 x float>, <4 x float>* [[P:%.*]], i64 1, i64 0
+; CHECK-NEXT: [[R:%.*]] = load float, float* [[GEP]], align 16
+; CHECK-NEXT: ret float [[R]]
+;
+ %gep = getelementptr inbounds <4 x float>, <4 x float>* %p, i64 1, i64 0
+ %r = load float, float* %gep, align 16
+ ret float %r
+}
+
define float @nonmatching_int_vector(<2 x i64>* align 16 dereferenceable(16) %p) {
; CHECK-LABEL: @nonmatching_int_vector(
; CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64>* [[P:%.*]] to float*
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