[PATCH] D85007: [PowerPC] PPCBoolRetToInt: Skip translation if there is ConstantExpr

Kai Luo via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 31 00:49:35 PDT 2020


lkail created this revision.
lkail added reviewers: nemanjai, kbarton, Carrot, PowerPC.
Herald added subscribers: llvm-commits, shchenz, hiraditya.
Herald added a project: LLVM.
lkail requested review of this revision.

PPCBoolRetToInt collects PHI, Argument, Call and Constant defs related to an `i1` value which later is translated to an `i32`/`i64` value. The `translate` method expects an `i1` value. However, if the `Constant` is a `ConstantExpr`, the type of the `ConstantExpr` might not be `i1`.

Fixes https://bugs.llvm.org/show_bug.cgi?id=46923.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D85007

Files:
  llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
  llvm/test/CodeGen/PowerPC/pr46923.ll


Index: llvm/test/CodeGen/PowerPC/pr46923.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/pr46923.ll
@@ -0,0 +1,31 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
+; RUN:   -ppc-asm-full-reg-names < %s | FileCheck %s
+
+ at bar = external constant i64, align 8
+
+define i1 @foo() {
+; CHECK-LABEL: foo:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    crxor 4*cr5+lt, 4*cr5+lt, 4*cr5+lt
+; CHECK-NEXT:    li r3, 0
+; CHECK-NEXT:    li r4, 1
+; CHECK-NEXT:    isel r3, r4, r3, 4*cr5+lt
+; CHECK-NEXT:    blr
+entry:
+  br label %next
+
+next:
+  br i1 undef, label %true, label %false
+
+true:
+  br label %end
+
+false:
+  br label %end
+
+end:
+  %a = phi i1 [ icmp ugt (i64 0, i64 ptrtoint (i64* @bar to i64)), %true ],
+              [ icmp ugt (i64 0, i64 2), %false ]
+  ret i1 %a
+}
Index: llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
+++ llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
@@ -90,6 +90,9 @@
 
   // Translate a i1 value to an equivalent i32/i64 value:
   Value *translate(Value *V) {
+    assert(V->getType() == Type::getInt1Ty(V->getContext()) &&
+           "Expect an i1 value");
+
     Type *IntTy = ST->isPPC64() ? Type::getInt64Ty(V->getContext())
                                 : Type::getInt32Ty(V->getContext());
 
@@ -227,8 +230,9 @@
     // CallInst. Potentially, bitwise operations (AND, OR, XOR, NOT) and sign
     // extension could also be handled in the future.
     for (Value *V : Defs)
-      if (!isa<PHINode>(V) && !isa<Constant>(V) &&
-          !isa<Argument>(V) && !isa<CallInst>(V))
+      if ((!isa<PHINode>(V) && !isa<Constant>(V) && !isa<Argument>(V) &&
+           !isa<CallInst>(V)) ||
+          isa<ConstantExpr>(V))
         return false;
 
     for (Value *V : Defs)


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