[PATCH] D85002: [RISCV] eliminate the repetition declare of SDLoc DL

[luxufan via Phabricator via llvm-commits]

StephenFan created this revision.
StephenFan added reviewers: asb, lenary, kamleshbhalui.
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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D85002

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp


Index: llvm/lib/Target/RISCV/RISCVISelLowering.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -1003,7 +1003,6 @@
   case ISD::BITCAST: {
     assert(N->getValueType(0) == MVT::i32 && Subtarget.is64Bit() &&
            Subtarget.hasStdExtF() && "Unexpected custom legalisation");
-    SDLoc DL(N);
     SDValue Op0 = N->getOperand(0);
     if (Op0.getValueType() != MVT::f32)
       return;


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