[llvm] 24f5235 - [ValueTracking] Add basic computeKnownBits support for llvm.abs intrinsic

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-07-30T16:26:54-07:00
New Revision: 24f5235d936537148fbfea0a6583ad7f2f775402

URL: https://github.com/llvm/llvm-project/commit/24f5235d936537148fbfea0a6583ad7f2f775402
DIFF: https://github.com/llvm/llvm-project/commit/24f5235d936537148fbfea0a6583ad7f2f775402.diff

LOG: [ValueTracking] Add basic computeKnownBits support for llvm.abs intrinsic

This includes basic support for computeKnownBits on abs. I've left FIXMEs for more complicated things we could do.

Differential Revision: https://reviews.llvm.org/D84963

Added: 
    llvm/test/Transforms/InstCombine/abs-intrinsic.ll

Modified: 
    llvm/lib/Analysis/ValueTracking.cpp

Removed: 
    


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diff  --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 3bf09b30b2f9..3b8c0fcca161 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -1642,6 +1642,17 @@ static void computeKnownBitsFromOperator(const Operator *I,
     if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
       switch (II->getIntrinsicID()) {
       default: break;
+      case Intrinsic::abs:
+        computeKnownBits(I->getOperand(0), Known2, Depth + 1, Q);
+        // Otherwise, if this call is undefined for INT_MIN, the result is
+        // positive.
+        if (match(II->getArgOperand(1), m_One()))
+          Known.Zero.setSignBit();
+        // Absolute value preserves trailing zero count.
+        Known.Zero.setLowBits(Known2.Zero.countTrailingOnes());
+        // FIXME: Handle known negative/non-negative input?
+        // FIXME: Calculate the negated Known bits and combine them?
+        break;
       case Intrinsic::bitreverse:
         computeKnownBits(I->getOperand(0), DemandedElts, Known2, Depth + 1, Q);
         Known.Zero |= Known2.Zero.reverseBits();

diff  --git a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
new file mode 100644
index 000000000000..780f28238bf6
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
@@ -0,0 +1,53 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+declare i32 @llvm.abs.i32(i32, i1)
+
+define i1 @abs_nsw_must_be_positive(i32 %x) {
+; CHECK-LABEL: @abs_nsw_must_be_positive(
+; CHECK-NEXT:    ret i1 true
+;
+  %abs = call i32 @llvm.abs.i32(i32 %x, i1 true)
+  %c2 = icmp sge i32 %abs, 0
+  ret i1 %c2
+}
+
+; Negative test, no nsw provides no information about the sign bit of the result.
+define i1 @abs_nonsw(i32 %x) {
+; CHECK-LABEL: @abs_nonsw(
+; CHECK-NEXT:    [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
+; CHECK-NEXT:    [[C2:%.*]] = icmp sgt i32 [[ABS]], -1
+; CHECK-NEXT:    ret i1 [[C2]]
+;
+  %abs = call i32 @llvm.abs.i32(i32 %x, i1 false)
+  %c2 = icmp sge i32 %abs, 0
+  ret i1 %c2
+}
+
+; abs preserves trailing zeros so the second and is unneeded
+define i32 @abs_trailing_zeros(i32 %x) {
+; CHECK-LABEL: @abs_trailing_zeros(
+; CHECK-NEXT:    [[AND:%.*]] = and i32 [[X:%.*]], -4
+; CHECK-NEXT:    [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[AND]], i1 false)
+; CHECK-NEXT:    ret i32 [[ABS]]
+;
+  %and = and i32 %x, -4
+  %abs = call i32 @llvm.abs.i32(i32 %and, i1 false)
+  %and2 = and i32 %abs, -2
+  ret i32 %and2
+}
+
+; negative test, can't remove the second and based on trailing zeroes.
+; FIXME: Could remove the first and using demanded bits.
+define i32 @abs_trailing_zeros_negative(i32 %x) {
+; CHECK-LABEL: @abs_trailing_zeros_negative(
+; CHECK-NEXT:    [[AND:%.*]] = and i32 [[X:%.*]], -2
+; CHECK-NEXT:    [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[AND]], i1 false)
+; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ABS]], -4
+; CHECK-NEXT:    ret i32 [[AND2]]
+;
+  %and = and i32 %x, -2
+  %abs = call i32 @llvm.abs.i32(i32 %and, i1 false)
+  %and2 = and i32 %abs, -4
+  ret i32 %and2
+}