[PATCH] D84899: [AMDGPU] Do not use undef on indirect source

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

I think I ran into these problems before. Last time I think I concluded we need to use pseudoinstructions and expand them after register allocation. I think the GPR index mode should definitely be using a pseudo instead of checking for the m0 implicit use.

Also this needs to fix GlobalISel



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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:3661
       BuildMI(MBB, I, DL, TII->get(AMDGPU::V_MOV_B32_e32), Dst)
-        .addReg(SrcReg, RegState::Undef, SubReg)
+        .addReg(SrcReg, 0, SubReg)
         .addReg(SrcReg, RegState::Implicit)
----------------
I think I ran into these problems before. Last time I think I concluded we need to use pseudoinstructions and expand them after register allocation rather than here


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  https://reviews.llvm.org/D84899/new/

https://reviews.llvm.org/D84899