[PATCH] D84914: [PowerPC] Add intrinsic to read or set FPSCR register

[Qiu Chaofan via Phabricator via llvm-commits]

qiucf created this revision.
qiucf added reviewers: jsji, nemanjai, steven.zhang, ZhangKang, PowerPC.
Herald added subscribers: llvm-commits, shchenz, kbarton, hiraditya.
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qiucf requested review of this revision.
Herald added a subscriber: wuzish.

This patch introduces two intrinsics: `llvm.ppc.setflm` and `llvm.ppc.readflm`. They read from or write to FPSCR register (floating-point status & control) which contains rounding mode and exception status.

To ensure correctness of program, we need to prevent FP operations from being moved across these intrinsics (`mffs/mtfsf` instruction), so here I set them as scheduling boundaries. We can relax such restriction if FPSCR is modeled well in the future.


https://reviews.llvm.org/D84914

Files:
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
  llvm/lib/Target/PowerPC/PPCInstrInfo.h
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
  llvm/test/CodeGen/PowerPC/read-set-flm.ll

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