[llvm] decfdb8 - [AMDGPU] Fixed formatting in GCNHazardRecognizer.cpp. NFC.

Stanislav Mekhanoshin via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 29 12:22:02 PDT 2020


Author: Stanislav Mekhanoshin
Date: 2020-07-29T12:21:28-07:00
New Revision: decfdb8ce3d511739b976d47862a98fe5674e2aa

URL: https://github.com/llvm/llvm-project/commit/decfdb8ce3d511739b976d47862a98fe5674e2aa
DIFF: https://github.com/llvm/llvm-project/commit/decfdb8ce3d511739b976d47862a98fe5674e2aa.diff

LOG: [AMDGPU] Fixed formatting in GCNHazardRecognizer.cpp. NFC.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
index 6c95c3310be6..30a563fdc1df 100644
--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
@@ -715,8 +715,9 @@ int GCNHazardRecognizer::createsVALUHazard(const MachineInstr &MI) {
   return -1;
 }
 
-int GCNHazardRecognizer::checkVALUHazardsHelper(const MachineOperand &Def,
-						const MachineRegisterInfo &MRI) {
+int
+GCNHazardRecognizer::checkVALUHazardsHelper(const MachineOperand &Def,
+                                            const MachineRegisterInfo &MRI) {
   // Helper to check for the hazard where VMEM instructions that store more than
   // 8 bytes can have there store data over written by the next instruction.
   const SIRegisterInfo *TRI = ST.getRegisterInfo();


        


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