[PATCH] D84866: [AArch64][GlobalISel] Selection support for vector DUP[X]lane instructions
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 29 09:18:57 PDT 2020
aemerson added inline comments.
================
Comment at: llvm/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir:157
%1:fpr(<2 x s64>) = COPY $q1
- %2:fpr(<2 x s64>) = G_SHUFFLE_VECTOR %0(<2 x s64>), %1, shufflemask(0, 0)
+ %2:fpr(<2 x s64>) = G_SHUFFLE_VECTOR %0(<2 x s64>), %1, shufflemask(1, 0)
$q0 = COPY %2(<2 x s64>)
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I modified this test so it could continue to select the tbl instruction.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D84866/new/
https://reviews.llvm.org/D84866
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