[PATCH] D84833: Implement indirect branch generation in position independent code for the RISC-V target

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

(and my `; TODO: Extend simm12's MCOperandPredicate so the jalr zero is printed as a jr.` then goes away, not because that's been fixed, but because by using PseudoJump we no longer expose it... perhaps that comment should be relocated to RISCVInstrInfo.td's definition of simm12, but it's a minor stylistic thing, it doesn't really matter beyond not being the canonical alias)


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  https://reviews.llvm.org/D84833/new/

https://reviews.llvm.org/D84833