[PATCH] D84841: GlobalISel: Handle llvm.expect

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: paquette, aemerson, dsanders, aditya_nandakumar.
Herald added subscribers: hiraditya, rovka.
Herald added a project: LLVM.
arsenm requested review of this revision.
Herald added a subscriber: wdng.

https://reviews.llvm.org/D84841

Files:
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-expect.ll


Index: llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-expect.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-expect.ll
@@ -0,0 +1,18 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc -global-isel -mtriple=aarch64-- -stop-after=irtranslator -verify-machineinstrs -o - %s | FileCheck %s
+
+define i64 @expect_i64(i64 %arg0) {
+  ; CHECK-LABEL: name: expect_i64
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK:   liveins: $x0
+  ; CHECK:   [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
+  ; CHECK:   $x0 = COPY [[COPY1]](s64)
+  ; CHECK:   RET_ReallyLR implicit $x0
+  %expval = call i64 @llvm.expect.i64(i64 %arg0, i64 1)
+  ret i64 %expval
+}
+
+declare i64 @llvm.expect.i64(i64, i64) nounwind readnone
+
+!0 = !{ i64 0, i64 2 }
Index: llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
===================================================================
--- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -1641,6 +1641,12 @@
   }
   case Intrinsic::invariant_end:
     return true;
+  case Intrinsic::expect: {
+    // Just replace __builtin_expect(exp, c) with exp.
+    MIRBuilder.buildCopy(getOrCreateVReg(CI),
+                         getOrCreateVReg(*CI.getArgOperand(0)));
+    return true;
+  }
   case Intrinsic::assume:
   case Intrinsic::var_annotation:
   case Intrinsic::sideeffect:


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