[PATCH] D81360: [PowerPC] Fix RM operands for some instructions

Zhang Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 28 18:31:17 PDT 2020


ZhangKang added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:12728
     // Save FPSCR value.
     BuildMI(*BB, MI, dl, TII->get(PPC::MFFS), OldFPSCRReg);
 
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jsji wrote:
> This will read RM as well, so we should add implicit operand here too.
I only remove use/def RM for MTFSB0/MTFSB1/MTFSFI, because they use the constant, we can know whether they will use the RM.
 For those instructions which use the Reg to set FPSCR, I have set it use/def RM in the td files. So MFFS will be added RM automatically.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.td:4333
                       "mtfsfi $BF, $U, $W", IIC_IntMFFS>;
-
+let Defs = [CR1] in
 def MTFSFI_rec : XLForm_4<63, 134, (outs crrc:$BF), (ins i32imm:$U, i32imm:$W),
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jsji wrote:
> Can we split this into another patch, this is not related to RM.
OK, I will commit a NFC patch directly to fix the CR1.


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https://reviews.llvm.org/D81360



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