[PATCH] D84784: [AArch64][GlobalISel] Select XRO addressing mode with wide immediates

[Jessica Paquette via Phabricator via llvm-commits]

paquette created this revision.
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Herald added subscribers: danielkiss, hiraditya, kristof.beyls, rovka.
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Port the wide immediate case from AArch64DAGToDAGISel::SelectAddrModeXRO.

If we have a wide immediate which can't be represented in an add, we can end up with code like this:

  mov  x0, imm
  add x1, base, x0
  ldr  x2, [x1, 0]

If we use the [base, xN] addressing mode instead, we can produce this:

  mov  x0, imm
  ldr  x2, [base, x0]

This saves 0.4% code size on 7zip at -O3, and gives a geomean code size improvement of 0.1% on CTMark.


https://reviews.llvm.org/D84784

Files:
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/xro-addressing-mode-constant.mir

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