[PATCH] D81360: [PowerPC] Fix RM operands for some instructions

[Zhang Kang via Phabricator via llvm-commits]

ZhangKang marked 2 inline comments as done.
ZhangKang added a comment.





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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.td:1510
 // Set the float rounding mode.
-let Uses = [RM], Defs = [RM] in {
+let Defs = [RM] in {
 def SETRNDi : PPCCustomInserterPseudo<(outs f8rc:$FRT), (ins u2imm:$RND),
----------------
jsji wrote:
> `int_ppc_setrnd` will **read** `FPSCR` which include `RM`, why we want to remove the use of it?
Yes, I should not remove the use for RM here, because we will use `MFFS` to store the `FPSCR`.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.td:2919
 // to manipulate FPSCR.  Note that FPSCR is not modeled at the DAG level.
-let Uses = [RM], Defs = [RM] in {
+let Defs = [RM] in {
   def MTFSB0 : XForm_43<63, 70, (outs), (ins u5imm:$FM),
----------------
jsji wrote:
> `mtfsb0 ` will only change `RM` when the bit is 30/31, which is actually in `SETRNDi`, `SETRND`.. So I think we should not always `Def` RM here? Maybe some `PatLeaf` to check bits and only set it with 30/31 bits?
> Similar for `mtfsfi`, `mtfsf`?
Has removed the rm for mtfsb0 mtfsb1 and mtfsfi.


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