[PATCH] D84592: [X86] Add custom lowering for llvm.roundeven with sse4.1.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 27 22:34:22 PDT 2020
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1026
+ case ISD::STRICT_FROUNDEVEN:
+ case ISD::FROUNDEVEN: Imm = 0x8; break;
case ISD::STRICT_FNEARBYINT:
----------------
sepavloff wrote:
> Should it be 0?
> From ROUNDSS description:
> ```
> Precision (signaled only if imm[3] = ‘0; if imm[3] = ‘1, then the Precision Mask in the MXSCSR is ignored and precision
> exception is not signaled.)
> ```
> Should it be 0?
> From ROUNDSS description:
> ```
> Precision (signaled only if imm[3] = ‘0; if imm[3] = ‘1, then the Precision Mask in the MXSCSR is ignored and precision
> exception is not signaled.)
> ```
I thought TS 18661-1 doesn't allow roundeven/round/ceil/trunc/floor to raise inexact exception.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D84592/new/
https://reviews.llvm.org/D84592
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