[llvm] 930fc0b - TableGen: Check if pattern outputs matches instruction defs

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2020-07-27T21:08:40-04:00
New Revision: 930fc0b300b01890d3cafabfa85a8a50b2ca890e

URL: https://github.com/llvm/llvm-project/commit/930fc0b300b01890d3cafabfa85a8a50b2ca890e
DIFF: https://github.com/llvm/llvm-project/commit/930fc0b300b01890d3cafabfa85a8a50b2ca890e.diff

LOG: TableGen: Check if pattern outputs matches instruction defs

Attempt to fix address sanitizer bots when building ARM.

Added: 
    

Modified: 
    llvm/utils/TableGen/GlobalISelEmitter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp
index a9ebf8f1beaf..52fe9b2af2f0 100644
--- a/llvm/utils/TableGen/GlobalISelEmitter.cpp
+++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp
@@ -4394,6 +4394,11 @@ Expected<action_iterator> GlobalISelEmitter::importExplicitDefRenderers(
 
   DstMIBuilder.addRenderer<CopyRenderer>(DstI->Operands[0].Name);
 
+  // Some instructions have multiple defs, but are missing a type entry
+  // (e.g. s_cc_out operands).
+  if (Dst->getExtTypes().size() < NumDefs)
+    return failedImport("unhandled discarded def");
+
   // Patterns only handle a single result, so any result after the first is an
   // implicitly dead def.
   for (unsigned I = 1; I < NumDefs; ++I) {