[llvm] ce944af - AMDGPU/GlobalISel: Mark G_ATOMICRMW_{NAND|FSUB} as lower

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2020-07-27T18:47:40-04:00
New Revision: ce944af33c1e011b69665b6892eb3ea142afcdf0

URL: https://github.com/llvm/llvm-project/commit/ce944af33c1e011b69665b6892eb3ea142afcdf0
DIFF: https://github.com/llvm/llvm-project/commit/ce944af33c1e011b69665b6892eb3ea142afcdf0.diff

LOG: AMDGPU/GlobalISel: Mark G_ATOMICRMW_{NAND|FSUB} as lower

These aren't implemented and we're still relying on the AtomicExpand
pass, but mark these as lower to eliminate a few of the few remaining
no rules defined cases.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index f1962db35bc01..bf0ebd322aa9e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -1493,6 +1493,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
       G_FCOPYSIGN,
 
       G_ATOMIC_CMPXCHG_WITH_SUCCESS,
+      G_ATOMICRMW_NAND,
+      G_ATOMICRMW_FSUB,
       G_READ_REGISTER,
       G_WRITE_REGISTER,