[PATCH] D84502: [AArch64][GlobalISel] Implement __builtin_return_address for PAC-RET
Ahmed Bougacha via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 27 10:44:38 PDT 2020
ab accepted this revision.
ab added a comment.
This revision is now accepted and ready to land.
This looks sensible, modulo a couple inline comments
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Comment at: llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp:4720
EntryBuilder.setInstr(*EntryBlock.begin());
- EntryBuilder.buildCopy({DstReg}, {Register(AArch64::LR)});
+ if (MF.getFunction().hasFnAttribute("sign-return-address")) {
+ if (STI.hasV8_3aOps()) {
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I don't know what model you have for the attribute and the command line options, and I guess you're probably aware, but this seems unsafe for depths > 0. I'm not sure there's a better way to deal with this, short of just forcing the strips in any aarch64 code, which is not an option. Maybe emitting strips when +pa is available? I imagine that's not at all reliable either.
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Comment at: llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp:4721
+ if (MF.getFunction().hasFnAttribute("sign-return-address")) {
+ if (STI.hasV8_3aOps()) {
+ Register TmpReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
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-> `hasPA()` ?
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Comment at: llvm/test/CodeGen/AArch64/GlobalISel/builtin-return-address-pacret.ll:1
+;; RUN: llc -mtriple aarch64 -O0 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-NOP
+;; RUN: llc -mtriple aarch64 -mattr=+v8.3a -O0 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-V83
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can you explicitly pass `-global-isel` ?
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https://reviews.llvm.org/D84502/new/
https://reviews.llvm.org/D84502
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