[PATCH] D84641: AMDGPU/GlobalISel: Fix selection of s1/s16 G_[F]CONSTANT
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 27 05:20:53 PDT 2020
arsenm created this revision.
arsenm added reviewers: foad, kerbowa, nhaehnle, hsmhsm, madhur13490.
Herald added subscribers: hiraditya, t-tye, tpr, dstuttard, rovka, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
The code to determine the value size was overcomplicated and only
correct in the case where the result register already had a register
class assigned. We can always take the size directly from the
register's type.
https://reviews.llvm.org/D84641
Files:
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fconstant.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
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