[PATCH] D84639: AMDGPU: Add type mangling to llvm.amdgcn.readfirstlane
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 27 05:13:01 PDT 2020
arsenm created this revision.
arsenm added reviewers: nhaehnle, mareko, tpr, dstuttard, foad, kpyzhov.
Herald added subscribers: kerbowa, hiraditya, t-tye, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
I've thought this should at minimum work for all the legal 32-bit
types for a long time. Arguably we should also legalize other types,
or at least multiples of 32.
This fixes selection for non-s32 types when readfirstlane is inserted
for SGPR return values.
This will require API users to add the type mangling when getting the
declaration. I think the way mesa constructs intrinsics will happen to
get away without needing to change anything.
https://reviews.llvm.org/D84639
Files:
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGenOpenCL/builtins-amdgcn.cl
llvm/include/llvm/IR/IntrinsicsAMDGPU.td
llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/AMDGPU/SIInstructions.td
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.readfirstlane.mir
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
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