[PATCH] D84622: [PowerPC] Implement Vector Extract Low/High Order Builtins in LLVM/Clang

[Biplob Mishra via Phabricator via llvm-commits]

biplmish created this revision.
biplmish added reviewers: amyk, lei, steven.zhang, PowerPC.
Herald added subscribers: cfe-commits, shchenz, wuzish, kbarton, hiraditya, nemanjai.
Herald added projects: clang, LLVM.

This patch implements builtins for the following prototypes:

vector unsigned long long vec_extractl (vector unsigned char, vector unsigned char, unsigned int);
vector unsigned long long vec_extractl (vector unsigned short, vector unsigned short, unsigned int);
vector unsigned long long vec_extractl (vector unsigned int, vector unsigned int, unsigned int);
vector unsigned long long vec_extractl (vector unsigned long long, vector unsigned long long, unsigned int);

vector unsigned long long vec_extracth (vector unsigned char, vector unsigned char, unsigned int);
vector unsigned long long vec_extracth (vector unsigned short, vector unsigned short, unsigned int);
vector unsigned long long vec_extracth (vector unsigned int, vector unsigned int, unsigned int);
vector unsigned long long vec_extracth (vector unsigned long long, vector unsigned long long, unsigned int);


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D84622

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Headers/altivec.h
  clang/test/CodeGen/builtins-ppc-p10vector.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/test/CodeGen/PowerPC/builtins-ppc-p10permute.ll

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