[llvm] 61ced4b - GlobalISel: Handle 'n' inline asm constraint

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2020-07-26T09:30:41-04:00
New Revision: 61ced4b87a80b65d89b2b84418038efde704b9ed

URL: https://github.com/llvm/llvm-project/commit/61ced4b87a80b65d89b2b84418038efde704b9ed
DIFF: https://github.com/llvm/llvm-project/commit/61ced4b87a80b65d89b2b84418038efde704b9ed.diff

LOG: GlobalISel: Handle 'n' inline asm constraint

Added: 
    

Modified: 
    llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
    llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp b/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
index 502f3cb85726..7acf9c843235 100644
--- a/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
@@ -658,6 +658,7 @@ bool InlineAsmLowering::lowerAsmOperandForConstraint(
   default:
     return false;
   case 'i': // Simple Integer or Relocatable Constant
+  case 'n': // immediate integer with a known value.
     if (ConstantInt *CI = dyn_cast<ConstantInt>(Val)) {
       assert(CI->getBitWidth() <= 64 &&
              "expected immediate to fit into 64-bits");

diff  --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
index 07b8dced5713..1315f1bc275e 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
@@ -326,4 +326,13 @@ entry:
   ret i32 %asm1
 }
 
+define amdgpu_kernel void @asm_constraint_n_n()  {
+  ; CHECK-LABEL: name: asm_constraint_n_n
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK:   INLINEASM &"s_trap ${0:n}", 1 /* sideeffect attdialect */, 13 /* imm */, 10
+  ; CHECK:   S_ENDPGM 0
+  tail call void asm sideeffect "s_trap ${0:n}", "n"(i32 10) #1
+  ret void
+}
+
 !0 = !{i32 70}