[PATCH] D84573: [AArch64][GlobalISel] Look through constants when selection stores of 0

[Jessica Paquette via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG604e33e83a55: [AArch64][GlobalISel] Look through constants when selection stores of 0 (authored by paquette).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D84573/new/

https://reviews.llvm.org/D84573

Files:
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir


Index: llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir
===================================================================
--- llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir
+++ llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir
@@ -13,6 +13,7 @@
   define void @store_zero_s32_gpr(i32* %addr) { ret void }
   define void @store_zero_s16(i32* %addr) { ret void }
   define void @store_zero_s8(i32* %addr) { ret void }
+  define void @store_zero_look_through_cst(i32* %addr) { ret void }
 
   define void @store_fi_s64_gpr() {
     %ptr0 = alloca i64
@@ -209,6 +210,22 @@
     G_STORE %1(s8), %0(p0) :: (store 1)
 ...
 
+---
+name:            store_zero_look_through_cst
+legalized:       true
+regBankSelected: true
+body:             |
+  bb.0:
+    liveins: $x0
+    ; CHECK-LABEL: name: store_zero_look_through_cst
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
+    ; CHECK: STRXui $xzr, [[COPY]], 0 :: (store 8 into %ir.addr)
+    %0:gpr(p0) = COPY $x0
+    %1:gpr(s32) = G_CONSTANT i32 0
+    %2:gpr(s64) = G_ZEXT %1
+    G_STORE  %2, %0 :: (store 8 into %ir.addr)
+...
+
 ---
 name:            store_fi_s64_gpr
 legalized:       true
Index: llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
===================================================================
--- llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -2304,18 +2304,21 @@
     I.addOperand(MachineOperand::CreateImm(Offset));
 
     // If we're storing a 0, use WZR/XZR.
-    if (auto CVal = getConstantVRegVal(ValReg, MRI)) {
-      if (*CVal == 0 && Opcode == TargetOpcode::G_STORE) {
+    if (Opcode == TargetOpcode::G_STORE) {
+      auto CVal = getConstantVRegValWithLookThrough(
+          ValReg, MRI, /*LookThroughInstrs = */ true,
+          /*HandleFConstants = */ false);
+      if (CVal && CVal->Value == 0) {
         unsigned Opc = I.getOpcode();
-        switch(Opc) {
-          case AArch64::STRWui:
-          case AArch64::STRHHui:
-          case AArch64::STRBBui:
-            I.getOperand(0).setReg(AArch64::WZR);
-            break;
-          case AArch64::STRXui:
-            I.getOperand(0).setReg(AArch64::XZR);
-            break;
+        switch (Opc) {
+        case AArch64::STRWui:
+        case AArch64::STRHHui:
+        case AArch64::STRBBui:
+          I.getOperand(0).setReg(AArch64::WZR);
+          break;
+        case AArch64::STRXui:
+          I.getOperand(0).setReg(AArch64::XZR);
+          break;
         }
       }
     }


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D84573.280661.patch
Type: text/x-patch
Size: 2549 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200725/b6d9120a/attachment.bin>