[PATCH] D83357: [llvm][sve] Reg + Imm addressing mode for ld1ro.
Francesco Petrogalli via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 24 09:19:52 PDT 2020
fpetrogalli marked an inline comment as done.
fpetrogalli added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:12308
+ if (VT == MVT::nxv8bf16 &&
+ !static_cast<const AArch64Subtarget &>(DAG.getSubtarget()).hasBF16())
+ return SDValue();
----------------
sdesmalen wrote:
> I think this should be `cast`, not `static_cast`.
reverting to `static_cast` as `cast` breaks the build
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D83357/new/
https://reviews.llvm.org/D83357
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