[PATCH] D83088: Introduce CfgTraits abstraction

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle marked 3 inline comments as done.
nhaehnle added inline comments.


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Comment at: llvm/include/llvm/CodeGen/MachineCfgTraits.h:44
+    // use on a 32-bit architecture.
+    assert(wrapped != (uintptr_t)-1 && wrapped != (uintptr_t)-2);
+
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arsenm wrote:
> I feel like there should be a better way to do this; we should probably have an assert where virtual registers are created
The reason for doing it here is that this is the place where the reinterpret happens. If the check is elsewhere, it's easy to miss by a user of this.


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Comment at: llvm/include/llvm/CodeGen/MachineCfgTraits.h:101
+      return nullptr;
+    return m_regInfo->getUniqueVRegDef(value)->getParent();
+  }
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arsenm wrote:
> I think regular getVRegDef is preferable for SSA MIR
Fixed locally.


Repository:
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  https://reviews.llvm.org/D83088/new/

https://reviews.llvm.org/D83088