[PATCH] D84463: [LegalizeTypes] Teach DAGTypeLegalizer::GenWidenVectorLoads to pad with undef if needed when concatenating small or loads to match a larger load

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

In D84463#2170812 <https://reviews.llvm.org/D84463#2170812>, @craig.topper wrote:

> In D84463#2170797 <https://reviews.llvm.org/D84463#2170797>, @spatel wrote:
>
> > I was stepping through that function myself after seeing the bug, and it wasn't clear to me why we are ok with reading more than the actual load size. Ie, we are only allowed to read <23 x float>, but we created a <16 x float> load + two <4 x float> loads right? Something later is guaranteed to reduce that to make sure we don't actually load the full <24 x float>?
>
>
> No we load the whole 24xfloat. Because the load is 16 byte aligned we know the last load won’t cross a page boundary so won’t fault.


Ah, ok. Might be good to include the same test with minimal alignment, so we see that difference in asm?
The way this code is replacing at the end of the ConcatOps vector is confusing (not sure if we can assert anything from the power-of-2 size assumption?), but that's existing code, so I won't hold up the fix. LGTM.


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