[PATCH] D84044: [AArch64][SVE] Add missing unwind info for SVE registers.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added a subscriber: rsandifo-arm.
sdesmalen added a comment.

In D84044#2165405 <https://reviews.llvm.org/D84044#2165405>, @efriedma wrote:

> > The CFI entries only cover a subset of the SVE callee-saves and only encodes the lower 64-bits, thus implementing the lowest common denominator ABI. Existing unwinders may support VG but only restore the lower 64-bits.
>
> I'm not sure I understand this.  If the calling convention requires saving the whole SVE register, unwinding needs to restore the entire SVE register, or else we corrupt the register in exception unwinding.


Yes that confused me as well, you are right that this would corrupt the register in exception unwinding.

I asked @rsandifo-arm about this, who suggested that the unwinder restores the callee-saved registers in the base ABI only, i.e. normal returns preserve extra registers, but exceptional returns don't. Additionally, existing unwinders may not support the new SVE registers to begin with. The SVE registers have different DWARF register numbers from their lower V0-V31, which may complicate the unwinder implementation as it needs to take into account the aliasing between the registers.

It seems that unwinders even treat 128-bit V0-V31 as 64-bit D0-D31 if no (.debug_info) context is available. From section 3.1. (DWARF register names)  of the DWARF for the ARM 64bit architecture with SVE support document (https://developer.arm.com/documentation/100985/0000/):

> 1. The size of a general register is to be taken from context. For instance in a .debug_info section if the DW_AT_location attribute of a variable is DW_OP_reg0 then the number of significant bits in the register is determined by the variable's DW_AT_type attribute. If no context is available (for example in .debug_frame or .eh_frame sections) then the register number refers to a 64-bit register.

:

> 5. In a similar manner to the general register file the size of an FP/Advanced SIMD register is taken from some external context to the register number. If no context is available then the only the least significant 64 bits of the register are referenced. In particular this means that the most significant part of a SIMD register is unrecoverable by frame unwinding.

The behaviour implemented in this patch is synonymous to that of GCC.


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https://reviews.llvm.org/D84044