[PATCH] D84377: [WebAssembly] Implement truncating vector stores

Thomas Lively via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 22 18:20:21 PDT 2020


tlively created this revision.
tlively added reviewers: aheejin, dschuff.
Herald added subscribers: llvm-commits, sunfish, hiraditya, jgravelle-google, sbc100.
Herald added a project: LLVM.

Rather than expanding truncating stores so that vectors are stored one
lane at a time, lower them to a sequence of instructions using
narrowing operations instead, when possible. Since the narrowing
operations have saturating semantics, but truncating stores require
truncation, mask the stored value to manually truncate it before
narrowing. Also, since narrowing is a binary operation, pass in a
constant all-zero vector as the second argument.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D84377

Files:
  llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
  llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
  llvm/test/CodeGen/WebAssembly/simd-offset.ll

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