[PATCH] D84337: AMDGPU: Don't assert on f16 inv2pi immediates pre-gfx8

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: dp, rampitec, kerbowa.
Herald added subscribers: hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

v_cvt_f32_f16 can still accept this value as a literal constant. This
showed up in GlobalISel since it doesn't have constant folding for
G_FPEXT.


https://reviews.llvm.org/D84337

Files:
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
  llvm/test/MC/AMDGPU/inline-imm-inv2pi.s


Index: llvm/test/MC/AMDGPU/inline-imm-inv2pi.s
===================================================================
--- /dev/null
+++ llvm/test/MC/AMDGPU/inline-imm-inv2pi.s
@@ -0,0 +1,10 @@
+// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SI %s
+// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
+
+// The value inv2pi should not assert on any targets, but is
+// printed differently depending on whether it's a legal inline
+// immediate or not.
+
+// SI: v_cvt_f32_f16_e32 v0, 0x3118 ; encoding: [0xff,0x16,0x00,0x7e,0x18,0x31,0x00,0x00]
+// VI: v_cvt_f32_f16_e32 v0, 0.15915494 ; encoding: [0xf8,0x16,0x00,0x7e]
+v_cvt_f32_f16_e32 v0, 0x3118
Index: llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -422,8 +422,8 @@
     O<< "4.0";
   else if (Imm == 0xC400)
     O<< "-4.0";
-  else if (Imm == 0x3118) {
-    assert(STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]);
+  else if (Imm == 0x3118 &&
+           STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) {
     O << "0.15915494";
   } else
     O << formatHex(static_cast<uint64_t>(Imm));


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