[PATCH] D84125: [IR] Add integer min/max/abs intrinsics

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 22 06:04:06 PDT 2020


arsenm added inline comments.


================
Comment at: llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp:1495-1505
+  case Intrinsic::abs: {
+    LLT Ty = getLLTForType(*CI.getType(), *DL);
+    LLT CmpTy = Ty.changeElementType(LLT::scalar(1));
+    Register Op = getOrCreateVReg(*CI.getOperand(0));
+    Register Zero = getOrCreateVReg(*Constant::getNullValue(CI.getType()));
+    Register Cmp = MIRBuilder.buildICmp(
+        ICmpInst::ICMP_SGE, CmpTy, Op, Zero).getReg(0);
----------------
The IRTranslator should not expand operations. This should add a G_ABS opcode and move this to LegalizerHelper


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D84125/new/

https://reviews.llvm.org/D84125





More information about the llvm-commits mailing list