[PATCH] D84152: [PowerPC] Fix wrong codegen when stack pointer has to realign performing dynalloc
Jinsong Ji via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 21 20:16:03 PDT 2020
jsji accepted this revision as: jsji.
jsji added a comment.
This revision is now accepted and ready to land.
LGTM with some nits.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:11959
+ // NegSize.
+ if (!KillNegSizeReg)
+ BuildMI(*MBB, {MI}, DL,
----------------
`KillNegSizeReg` only used once, I think we can inline it here. Also add some comments or move `By introducing PREPARE_PROBED_ALLOCA_NEGSIZE_OPT`... up here.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:11972
+ BuildMI(*MBB, {MI}, DL,
+ TII->get(isPPC64 ? PPC::PREPARE_PROBED_ALLOCA_NEGSIZE_OPT_64
+ : PPC::PREPARE_PROBED_ALLOCA_NEGSIZE_OPT_32),
----------------
Maybe rename `PREPARE_PROBED_ALLOCA_NEGSIZE_OPT_64` to something like `PREPARE_PROBED_ALLOCA_SAME_REG`
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:11975
+ FramePointer)
+ .addDef(ActualNegSizeReg)
+ .addReg(NegSizeReg)
----------------
Maybe we can common up these `.add..`
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D84152/new/
https://reviews.llvm.org/D84152
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