[PATCH] D84194: [AMDGPU] Correct the number of SGPR blocks used for GFX9

[Ronak Chauhan via Phabricator via llvm-commits]

rochauha created this revision.
rochauha added reviewers: scott.linder, t-tye.
Herald added subscribers: llvm-commits, kerbowa, hiraditya, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl, arsenm.
Herald added a project: LLVM.

GFX9 has different granularity than GFX6-8, as per https://llvm.org/docs/AMDGPUUsage.html#amdgpu-amdhsa-compute-pgm-rsrc1-gfx6-gfx10-table
But this isn't reflected in the implementation. This patch patch addresses it.

The difference is seen when a value aligns to 8 but not to 16. (for example 40, 56)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D84194

Files:
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp


Index: llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -344,7 +344,8 @@
 }
 
 unsigned getSGPREncodingGranule(const MCSubtargetInfo *STI) {
-  return 8;
+  // 16 for GFX9, 8 for GFX6-8
+  return isGFX9(*STI) ? 16 : 8;
 }
 
 unsigned getTotalNumSGPRs(const MCSubtargetInfo *STI) {
@@ -433,7 +434,8 @@
 unsigned getNumSGPRBlocks(const MCSubtargetInfo *STI, unsigned NumSGPRs) {
   NumSGPRs = alignTo(std::max(1u, NumSGPRs), getSGPREncodingGranule(STI));
   // SGPRBlocks is actual number of SGPR blocks minus 1.
-  return NumSGPRs / getSGPREncodingGranule(STI) - 1;
+  unsigned NumSGPRBlocks = NumSGPRs / getSGPREncodingGranule(STI) - 1;
+  return isGFX9(*STI) ? NumSGPRBlocks * 2 : NumSGPRBlocks;
 }
 
 unsigned getVGPRAllocGranule(const MCSubtargetInfo *STI,


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