[PATCH] D84098: [AMDGPU][MC] Corrected decoding of 16-bit literals
Dmitry Preobrazhensky via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 20 06:58:09 PDT 2020
dp marked 2 inline comments as done.
dp added inline comments.
================
Comment at: llvm/test/CodeGen/AMDGPU/add.i16.ll:39
; VI: flat_load_ushort [[A:v[0-9]+]]
-; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0xfffffcb3, [[A]]
+; VI: v_add_u16_e32 [[ADD:v[0-9]+]], -0x34d, [[A]]
; VI-NEXT: buffer_store_short [[ADD]]
----------------
arsenm wrote:
> We currently don't match source modifiers on integer instructions, so there's no situation where a - should appear here
This is not a modifier. '-' is a part of constant. It is handled uniformly for integer and fp operands. See a comment at AMDGPUAsmParser::parseSP3NegModifier:
// Currently this modifier is allowed in the following context:
//
// 1. Before a register, e.g. "-v0", "-v[...]" or "-[v0,v1]".
// 2. Before an 'abs' modifier: -abs(...)
// 3. Before an SP3 'abs' modifier: -|...|
//
// In all other cases "-" is handled as a part
// of an expression that follows the sign.
Do you prefer 0xFFFFFFFFFFFFFCB3?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D84098/new/
https://reviews.llvm.org/D84098
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