[PATCH] D84166: AMDGPU: Simplify f16 to i64 custom lowering
    Matt Arsenault via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Mon Jul 20 06:31:59 PDT 2020
    
    
  
arsenm added inline comments.
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Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2721
   EVT SrcVT = Src.getValueType();
   if (Subtarget->has16BitInsts() && SrcVT == MVT::f16) {
     SDLoc DL(Op);
----------------
I don't think this needs to be limited to Subtarget->has16BitInsts()
================
Comment at: llvm/test/CodeGen/AMDGPU/fptosi.f16.ll:42
 ; GCN: v_cvt_f32_f16_e32
 ; GCN: s_endpgm
 define amdgpu_kernel void @fptosi_f16_to_i64(
----------------
These checks should be strengthened to show the new expansion
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D84166/new/
https://reviews.llvm.org/D84166
    
    
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