[PATCH] D84085: [SROA][Mem2Reg] Do not crash on alloca + addrspacecast
Johannes Doerfert via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 18 16:37:08 PDT 2020
jdoerfert updated this revision to Diff 279035.
jdoerfert added a comment.
Split test and merge the SROA part into existing test case
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D84085/new/
https://reviews.llvm.org/D84085
Files:
llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
llvm/test/Transforms/Mem2Reg/alloca_addrspace.ll
llvm/test/Transforms/SROA/alloca-address-space.ll
Index: llvm/test/Transforms/SROA/alloca-address-space.ll
===================================================================
--- llvm/test/Transforms/SROA/alloca-address-space.ll
+++ llvm/test/Transforms/SROA/alloca-address-space.ll
@@ -1,4 +1,5 @@
; RUN: opt < %s -sroa -S | FileCheck %s
+; RUN: opt < %s -passes=sroa -S | FileCheck %s
target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32-p3:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64-A2"
declare void @llvm.memcpy.p2i8.p2i8.i32(i8 addrspace(2)* nocapture, i8 addrspace(2)* nocapture readonly, i32, i1)
@@ -127,3 +128,15 @@
store i64 %v2, i64 addrspace(1)* %p2
ret void
}
+
+define void @addressspace_alloca_lifetime() {
+; CHECK-LABEL: @addressspace_alloca_lifetime(
+; CHECK-NEXT: ret void
+;
+ %alloca = alloca i8, align 8, addrspace(2)
+ %cast = addrspacecast i8 addrspace(2)* %alloca to i8*
+ call void @llvm.lifetime.start.p0i8(i64 2, i8* %cast)
+ ret void
+}
+
+declare void @llvm.lifetime.start.p0i8(i64 %size, i8* nocapture %ptr)
Index: llvm/test/Transforms/Mem2Reg/alloca_addrspace.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/Mem2Reg/alloca_addrspace.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -mem2reg -S | FileCheck %s
+; RUN: opt < %s -passes=mem2reg -S | FileCheck %s
+
+; Do not crash ;)
+
+target datalayout = "e-p:64:64-p5:32:32-A5"
+
+define amdgpu_kernel void @addressspace_alloca() {
+; CHECK-LABEL: @addressspace_alloca(
+; CHECK-NEXT: ret void
+;
+ %alloca = alloca i8, align 8, addrspace(5)
+ %cast = addrspacecast i8 addrspace(5)* %alloca to i8*
+ call void @llvm.lifetime.start.p0i8(i64 2, i8* %cast)
+ ret void
+}
+
+declare void @llvm.lifetime.start.p0i8(i64 %size, i8* nocapture %ptr)
Index: llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
===================================================================
--- llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
+++ llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
@@ -95,6 +95,9 @@
return false;
if (!onlyUsedByLifetimeMarkers(GEPI))
return false;
+ } else if (const AddrSpaceCastInst *ASCI = dyn_cast<AddrSpaceCastInst>(U)) {
+ if (!onlyUsedByLifetimeMarkers(ASCI))
+ return false;
} else {
return false;
}
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