[PATCH] D84111: [X86] Enable PostRA scheduler in the SNB scheduler model the default for Linux and Windows w/clang

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Jul 18 15:44:49 PDT 2020


craig.topper created this revision.
craig.topper added reviewers: spatel, RKSimon, echristo, andreadb.
Herald added subscribers: mstorsjo, jfb, hiraditya, qcolombet.
Herald added a project: LLVM.

This patch enables the PostRA scheduler in the SNB scheduler model.
This model is used by default for 32-bit and 64-bit Linux and
Windows.

We were previously using PostRA by default on 32-bit until I
changed 'pentium4' to use the SNB scheduler earlier this week.

I haven't done any perf measurements with this yet. Anything
specific people would like to see?


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D84111

Files:
  llvm/lib/Target/X86/X86SchedSandyBridge.td
  llvm/test/CodeGen/X86/2007-05-15-maskmovq.ll
  llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
  llvm/test/CodeGen/X86/2009-03-23-MultiUseSched.ll
  llvm/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll
  llvm/test/CodeGen/X86/2011-05-09-loaduse.ll
  llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll
  llvm/test/CodeGen/X86/2011-10-19-widen_vselect.ll
  llvm/test/CodeGen/X86/2011-10-21-widen-cmp.ll
  llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll
  llvm/test/CodeGen/X86/2012-11-28-merge-store-alias.ll
  llvm/test/CodeGen/X86/GlobalISel/add-vec.ll
  llvm/test/CodeGen/X86/atom-sched.ll
  llvm/test/CodeGen/X86/atomic-load-store-wide.ll
  llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
  llvm/test/CodeGen/X86/avoid-sfb.ll
  llvm/test/CodeGen/X86/avx-arith.ll
  llvm/test/CodeGen/X86/avx-win64-args.ll
  llvm/test/CodeGen/X86/avx.ll
  llvm/test/CodeGen/X86/avx1-logical-load-folding.ll
  llvm/test/CodeGen/X86/break-false-dep.ll
  llvm/test/CodeGen/X86/bypass-slow-division-tune.ll
  llvm/test/CodeGen/X86/byval7.ll
  llvm/test/CodeGen/X86/catchpad-regmask.ll
  llvm/test/CodeGen/X86/cfguard-x86-64-vectorcall.ll
  llvm/test/CodeGen/X86/cfguard-x86-vectorcall.ll
  llvm/test/CodeGen/X86/cmov-fp.ll
  llvm/test/CodeGen/X86/cmpxchg-clobber-flags.ll
  llvm/test/CodeGen/X86/cmpxchg8b.ll
  llvm/test/CodeGen/X86/coalescer-commute1.ll
  llvm/test/CodeGen/X86/combine-or.ll
  llvm/test/CodeGen/X86/commute-two-addr.ll
  llvm/test/CodeGen/X86/cvtv2f32.ll
  llvm/test/CodeGen/X86/dagcombine-buildvector.ll
  llvm/test/CodeGen/X86/extractelement-legalization-store-ordering.ll
  llvm/test/CodeGen/X86/fmf-flags.ll
  llvm/test/CodeGen/X86/fold-load-vec.ll
  llvm/test/CodeGen/X86/fold-pcmpeqd-2.ll
  llvm/test/CodeGen/X86/fp-load-trunc.ll
  llvm/test/CodeGen/X86/fp-trunc.ll
  llvm/test/CodeGen/X86/fp128-i128.ll
  llvm/test/CodeGen/X86/gather-addresses.ll
  llvm/test/CodeGen/X86/inreg.ll
  llvm/test/CodeGen/X86/lifetime-alias.ll
  llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
  llvm/test/CodeGen/X86/machine-combiner-int.ll
  llvm/test/CodeGen/X86/machine-combiner.ll
  llvm/test/CodeGen/X86/machine-trace-metrics-crash.ll
  llvm/test/CodeGen/X86/memcpy-2.ll
  llvm/test/CodeGen/X86/memcpy.ll
  llvm/test/CodeGen/X86/memset-2.ll
  llvm/test/CodeGen/X86/memset-sse-stack-realignment.ll
  llvm/test/CodeGen/X86/misched-aa-colored.ll
  llvm/test/CodeGen/X86/misched-matrix.ll
  llvm/test/CodeGen/X86/misched-new.ll
  llvm/test/CodeGen/X86/movgs.ll
  llvm/test/CodeGen/X86/patchpoint-webkit_jscc.ll
  llvm/test/CodeGen/X86/patchpoint.ll
  llvm/test/CodeGen/X86/pointer-vector.ll
  llvm/test/CodeGen/X86/post-ra-sched.ll
  llvm/test/CodeGen/X86/pow.ll
  llvm/test/CodeGen/X86/pr11334.ll
  llvm/test/CodeGen/X86/pr14088.ll
  llvm/test/CodeGen/X86/pr14314.ll
  llvm/test/CodeGen/X86/pr15267.ll
  llvm/test/CodeGen/X86/pr21792.ll
  llvm/test/CodeGen/X86/pr31045.ll
  llvm/test/CodeGen/X86/pr32610.ll
  llvm/test/CodeGen/X86/pr34088.ll
  llvm/test/CodeGen/X86/pr34629.ll
  llvm/test/CodeGen/X86/pr40539.ll
  llvm/test/CodeGen/X86/preserve_mostcc64.ll
  llvm/test/CodeGen/X86/rdrand.ll
  llvm/test/CodeGen/X86/rdseed.ll
  llvm/test/CodeGen/X86/recip-fastmath.ll
  llvm/test/CodeGen/X86/recip-fastmath2.ll
  llvm/test/CodeGen/X86/rot32.ll
  llvm/test/CodeGen/X86/rot64.ll
  llvm/test/CodeGen/X86/sandybridge-loads.ll
  llvm/test/CodeGen/X86/sibcall.ll
  llvm/test/CodeGen/X86/sjlj.ll
  llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll
  llvm/test/CodeGen/X86/sqrt-fastmath.ll
  llvm/test/CodeGen/X86/sse-domains.ll
  llvm/test/CodeGen/X86/sse_partial_update.ll
  llvm/test/CodeGen/X86/statepoint-vector.ll
  llvm/test/CodeGen/X86/tailcall-64.ll
  llvm/test/CodeGen/X86/test-nofold.ll
  llvm/test/CodeGen/X86/unaligned-load.ll
  llvm/test/CodeGen/X86/vec_compare.ll
  llvm/test/CodeGen/X86/vector-gep.ll
  llvm/test/CodeGen/X86/vector-reduce-fadd-fast.ll
  llvm/test/CodeGen/X86/vector-reduce-fmul-fast.ll
  llvm/test/CodeGen/X86/vector-shuffle-combining.ll
  llvm/test/CodeGen/X86/volatile-memstores-nooverlapping-load-stores.ll
  llvm/test/CodeGen/X86/vsplit-and.ll
  llvm/test/CodeGen/X86/x86-cmov-converter.ll
  llvm/test/DebugInfo/COFF/fpo-stack-protect.ll
  llvm/test/DebugInfo/COFF/inlining.ll
  llvm/test/DebugInfo/COFF/local-variables.ll
  llvm/test/DebugInfo/COFF/pieces.ll
  llvm/test/DebugInfo/COFF/register-variables.ll
  llvm/test/DebugInfo/X86/spill-nospill.ll
  llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll

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