[PATCH] D84034: [SVE] Add lowering for fixed length vector fdiv, fma, fmul and fsub operations.
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 17 15:49:31 PDT 2020
paulwalker-arm added a comment.
In D84034#2159377 <https://reviews.llvm.org/D84034#2159377>, @cameron.mcinally wrote:
> Do we need to worry about fixed types less than 64b? E.g. <1 x float>.
At some point I think yes. Currently SVE fixed length code generation tries to remain compatible with the way NEON does things for the types it already supported. That means <1 x float> will likely be widen to <2 x float> before selection. It's an area that really needs an ABI defining before we can break away from NEON.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D84034/new/
https://reviews.llvm.org/D84034
More information about the llvm-commits
mailing list