[PATCH] D84026: [AMDGPU][MC] Added support of SP3 syntax for MTBUF format modifier

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp created this revision.
dp added reviewers: arsenm, rampitec, artem.tamazov, vpykhtin.
Herald added subscribers: llvm-commits, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

Currently supported LLVM MTBUF syntax is not compatible with SP3:

  op     dst, addr, rsrc, FORMAT, soffset

This change adds support for SP3 syntax:

  op     dst, addr, rsrc, soffset SP3FORMAT

In addition to being compatible with SP3, this syntax allows using symbolic names for data, numeric and unified formats. Below is a list of added syntax variants.

  format:<expression>
  format:[<numeric-format-name>,<data-format-name>]
  format:[<data-format-name>]
  format:[<numeric-format-name>]
  format:[<unified-format-name>]

The last syntax is supported for GFX10 only.


https://reviews.llvm.org/D84026

Files:
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  llvm/lib/Target/AMDGPU/BUFInstructions.td
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
  llvm/lib/Target/AMDGPU/SIDefines.h
  llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
  llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.d16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.dwordx3.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.d16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.dwordx3.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.ll
  llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s
  llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s
  llvm/test/MC/AMDGPU/mtbuf-gfx10.s
  llvm/test/MC/AMDGPU/mtbuf.s
  llvm/test/MC/Disassembler/AMDGPU/buf_fmt_packed_d16.txt
  llvm/test/MC/Disassembler/AMDGPU/buf_fmt_unpacked_d16.txt
  llvm/test/MC/Disassembler/AMDGPU/mtbuf_gfx10.txt
  llvm/test/MC/Disassembler/AMDGPU/mtbuf_vi.txt

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