[PATCH] D81603: [WIP] MIR Statepoint refactoring: Pass GC pointergs in VRegs.

[Denis Antrushin via Phabricator via llvm-commits]

dantrushin updated this revision to Diff 278535.
dantrushin added a comment.

Update to reflect current state of development


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81603/new/

https://reviews.llvm.org/D81603

Files:
  llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
  llvm/include/llvm/CodeGen/StackMaps.h
  llvm/include/llvm/Target/Target.td
  llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
  llvm/lib/CodeGen/InlineSpiller.cpp
  llvm/lib/CodeGen/MachineVerifier.cpp
  llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
  llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
  llvm/lib/CodeGen/SelectionDAG/StatepointLowering.h
  llvm/lib/CodeGen/TargetInstrInfo.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/test/CodeGen/X86/statepoint-fixup-call.mir
  llvm/test/CodeGen/X86/statepoint-fixup-invoke.mir
  llvm/test/CodeGen/X86/statepoint-fixup-shared-ehpad.mir
  llvm/test/CodeGen/X86/statepoint-vreg-folding.mir
  llvm/test/CodeGen/X86/statepoint-vreg.ll
  llvm/test/CodeGen/X86/statepoint-vreg.mir

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