[PATCH] D79870: [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbb asm instructions
Lewis Revill via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 15 04:20:35 PDT 2020
This revision was automatically updated to reflect the committed changes.
Closed by commit rGe2692f0ee7f3: [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbb asm… (authored by lewis-revill).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D79870/new/
https://reviews.llvm.org/D79870
Files:
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
llvm/test/CodeGen/RISCV/rv32Zbb.ll
llvm/test/CodeGen/RISCV/rv64Zbb.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D79870.278136.patch
Type: text/x-patch
Size: 80488 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200715/b43f4b14/attachment.bin>
More information about the llvm-commits
mailing list