[PATCH] D79785: [ARM] Register pressure with -mthumb forces register reload before each call

Prathamesh via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 15 02:29:07 PDT 2020


prathamesh added a comment.

In D79785#2110994 <https://reviews.llvm.org/D79785#2110994>, @ostannard wrote:

> That sounds very fragile - I can easily imagine future, unrelated changes removing that COPY, or emitting one in the case which doesn't currently have one, which would completely change the effect of this patch.
>
> I think the right way to do this is to look through the COPYs, find all the uses of the constant pool load, and do this transformation if and only if there are fewer than three uses of the load.
>
> The alternative would be to not do the direct->indirect transformation in the first place for Thumb1-only targets, since they don't have enough registers to make it worthwhile very often. That would be trading off some generated code quality for simpler implementation.




In D79785#2132720 <https://reviews.llvm.org/D79785#2132720>, @prathamesh wrote:

> Hi,
>  Sorry for late response. In the attached patch, I added a couple of more constraints if we're compiling for Thumb1:
>
> 1. Number of args passed + caller's num of args < total number of available regs
> 2. Each arg to callee, is either a "pass thru" arg, OR 8-bit imm OR a constant load.  The intent is to allow only those args that need a single register for computation.
>
>   The motivation is to allow the transform for simple cases which fit the above cases, or use direct call otherwise. Does it look reasonable ? The patch does not regress ARM tests and converts all calls to bl in the test attached in patch.


ping ?

Thanks,
Prathamesh

> Thanks,
> Prathamesh




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