[PATCH] D79873: [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbbp asm instructions
Paolo Savini via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 14 08:28:48 PDT 2020
PaoloS marked an inline comment as done.
PaoloS added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoB.td:675
+// There's no encoding for roli as it can be implemented with rori by negating
+// the immediate.
+let Predicates = [HasStdExtZbbOrZbp] in
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lewis-revill wrote:
> A little confused by this comment here, do you mean there is no pattern matching rather than there is no encoding.
Yeah, I mean there's no encoding at all. By consequence no pattern-matching
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https://reviews.llvm.org/D79873/new/
https://reviews.llvm.org/D79873
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