[PATCH] D83125: [AArch64][SVE] Remove erroneous assert in resolveFrameOffsetReference

[Sander de Smalen via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGa8f4f85d84c1: [AArch64][SVE] Remove erroneous assert in resolveFrameOffsetReference (authored by sdesmalen).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83125/new/

https://reviews.llvm.org/D83125

Files:
  llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
  llvm/test/CodeGen/AArch64/framelayout-sve.mir


Index: llvm/test/CodeGen/AArch64/framelayout-sve.mir
===================================================================
--- llvm/test/CodeGen/AArch64/framelayout-sve.mir
+++ llvm/test/CodeGen/AArch64/framelayout-sve.mir
@@ -30,6 +30,7 @@
   define void @test_address_sve_fp() nounwind { entry: unreachable }
   define void @test_stack_arg_sve() nounwind { entry: unreachable }
   define void @test_address_sve_out_of_range() nounwind { entry: unreachable }
+  define void @test_address_gpr_vla_nobp() nounwind { entry: unreachable }
   define aarch64_sve_vector_pcs void @save_restore_pregs_sve() nounwind { entry: unreachable }
   define aarch64_sve_vector_pcs void @save_restore_zregs_sve() nounwind { entry: unreachable }
   define aarch64_sve_vector_pcs void @save_restore_sve() nounwind { entry: unreachable }
@@ -334,6 +335,39 @@
     RET_ReallyLR
 ---
 ...
+# Test that non-SVE objects are accessed from FP when there is no BP,
+# but the SP cannot be used because of variable-length arrays.
+#
+# +----------+ <- FP
+# | %fstack.0|  // 16 scalable bytes
+# +----------+ <- @FP - 16 scalable bytes
+# | %stack.0 |  // 16 bytes
+# +----------+ <- @FP - 16 scalable bytes - 16b
+# : %stack.1 :  // variable length
+# +----------+ <- SP
+
+# CHECK-LABEL: name: test_address_gpr_vla_nobp
+# CHECK:      bb.0.entry:
+# CHECK:      $[[TMP:x[0-9]+]] = ADDVL_XXI $fp, -1
+# CHECK-NEXT: STURXi $xzr, killed $[[TMP]], -16
+# CHECK:      RET_ReallyLR
+name:            test_address_gpr_vla_nobp
+frameInfo:
+  maxAlignment:  16
+fixedStack:
+  - { id: 0, stack-id: sve-vec, size: 16, alignment: 8, offset: -16 }
+stack:
+  - { id: 0, stack-id: default, size: 16, alignment: 8 }
+  - { id: 1, stack-id: default, type: variable-sized }
+body:             |
+  bb.0.entry:
+    liveins: $xzr
+
+    STRXui $xzr, %stack.0, 0
+
+    RET_ReallyLR
+---
+...
 # CHECK-LABEL: name: save_restore_pregs_sve
 # CHECK: $sp = frame-setup ADDVL_XXI $sp, -1
 # CHECK: frame-setup STR_PXI killed $p6, $sp, 5
Index: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -1818,10 +1818,8 @@
         bool CanUseBP = RegInfo->hasBasePointer(MF);
         if (FPOffsetFits && CanUseBP) // Both are ok. Pick the best.
           UseFP = PreferFP;
-        else if (!CanUseBP) { // Can't use BP. Forced to use FP.
-          assert(!SVEStackSize && "Expected BP to be available");
+        else if (!CanUseBP) // Can't use BP. Forced to use FP.
           UseFP = true;
-        }
         // else we can use BP and FP, but the offset from FP won't fit.
         // That will make us scavenge registers which we can probably avoid by
         // using BP. If it won't fit for BP either, we'll scavenge anyway.


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