[PATCH] D83467: [SVE][CodeGen] Add README for SVE-related warnings in tests

David Sherwood via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 14 00:31:28 PDT 2020 

This revision was automatically updated to reflect the committed changes.
Closed by commit rG02650ac03632: [SVE][CodeGen] Add README for SVE-related warnings in tests (authored by david-arm).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83467/new/

https://reviews.llvm.org/D83467

Files:
  llvm/test/CodeGen/AArch64/README
  llvm/test/CodeGen/AArch64/sve-alloca-stackid.ll
  llvm/test/CodeGen/AArch64/sve-bitcast.ll
  llvm/test/CodeGen/AArch64/sve-breakdown-scalable-vectortype.ll
  llvm/test/CodeGen/AArch64/sve-callbyref-notailcall.ll
  llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
  llvm/test/CodeGen/AArch64/sve-calling-convention-tuple-types.ll
  llvm/test/CodeGen/AArch64/sve-calling-convention.ll
  llvm/test/CodeGen/AArch64/sve-extract-element.ll
  llvm/test/CodeGen/AArch64/sve-extract-subvector.ll
  llvm/test/CodeGen/AArch64/sve-fcmp.ll
  llvm/test/CodeGen/AArch64/sve-fp.ll
  llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
  llvm/test/CodeGen/AArch64/sve-gep.ll
  llvm/test/CodeGen/AArch64/sve-insert-element.ll
  llvm/test/CodeGen/AArch64/sve-int-arith-imm.ll
  llvm/test/CodeGen/AArch64/sve-int-arith-pred.ll
  llvm/test/CodeGen/AArch64/sve-int-arith.ll
  llvm/test/CodeGen/AArch64/sve-int-div-pred.ll
  llvm/test/CodeGen/AArch64/sve-int-imm.ll
  llvm/test/CodeGen/AArch64/sve-int-log-imm.ll
  llvm/test/CodeGen/AArch64/sve-int-log-pred.ll
  llvm/test/CodeGen/AArch64/sve-int-log.ll
  llvm/test/CodeGen/AArch64/sve-int-mad-pred.ll
  llvm/test/CodeGen/AArch64/sve-int-mul-pred.ll
  llvm/test/CodeGen/AArch64/sve-int-reduce-pred.ll
  llvm/test/CodeGen/AArch64/sve-intrinsic-opts-ptest.ll
  llvm/test/CodeGen/AArch64/sve-intrinsic-opts-reinterpret.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-adr.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-contiguous-prefetches.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-conversion.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-counting-bits.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-counting-elems.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-create-tuple.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-dup-x.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-32bit-scaled-offsets.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-32bit-unscaled-offsets.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-64bit-scaled-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-64bit-unscaled-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-vector-base-imm-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-vector-base-scalar-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ffr-manipulation.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith-merging.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-fp-compares.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-fp-converts.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-fp-reduce.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-32bit-scaled-offsets.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-32bit-unscaled-offsets.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-scaled-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-unscaled-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base-imm-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base-scalar-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-gather-prefetches-scalar-base-vector-indexes.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-gather-prefetches-vect-base-imm-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-gather-prefetches-vect-base-invalid-imm-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-index.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-imm.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-merging.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares-with-imm.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ld1-addressing-mode-reg-imm.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ld1-addressing-mode-reg-reg.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ld1.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ld1ro-addressing-mode-reg-reg.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ld1ro.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-loads-ff.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-logical.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-fp32.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-fp64.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-int8.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-pred-creation.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-pred-operations.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-pred-testing.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-reinterpret.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-reversal.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-scalar-to-vec.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-32bit-scaled-offsets.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-32bit-unscaled-offsets.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-64bit-scaled-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-64bit-unscaled-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector-base-imm-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector-base-scalar-offset.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-sel.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-shifts-merging.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-shifts.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-sqdec.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-sqinc.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-st1-addressing-mode-reg-imm.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-st1-addressing-mode-reg-reg.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-st1.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-imm-addr-mode.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-reg-addr-mode.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-uqdec.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-uqinc.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-while.ll
  llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll
  llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
  llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll
  llvm/test/CodeGen/AArch64/sve-masked-ldst-trunc.ll
  llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll
  llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
  llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
  llvm/test/CodeGen/AArch64/sve-pred-log.ll
  llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll
  llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing-mode-reg-reg.ll
  llvm/test/CodeGen/AArch64/sve-select.ll
  llvm/test/CodeGen/AArch64/sve-setcc.ll
  llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll
  llvm/test/CodeGen/AArch64/sve-trunc.ll
  llvm/test/CodeGen/AArch64/sve-vector-splat.ll
  llvm/test/CodeGen/AArch64/sve-vscale-combine.ll
  llvm/test/CodeGen/AArch64/sve-vscale.ll
  llvm/test/CodeGen/AArch64/sve-vselect-imm.ll
  llvm/test/CodeGen/AArch64/sve-zeroinit.ll

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