[PATCH] D83153: [DAGCombiner] Prevent regression in isMulAddWithConstProfitable

[Ben Shi via Phabricator via llvm-commits]

benshi001 added a comment.

Concusion,

1. RISCV got improved

2. X86 got slight improved

3. For aarch64's test urem-seteq-nonzero.ll,

3.1. 2 cases have one more instruction emitted,
3.2. 2 other cases have one less instruction emitted,
3.3. 9 other 9 cases have no change in instruction amount, but have madd replaced by mul.
Since madd has larger latency than mul, I think my change also makes aarch64 optimized in total.


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  https://reviews.llvm.org/D83153/new/

https://reviews.llvm.org/D83153