[PATCH] D83590: [PowerPC][MachinePipeliner] Enable pipeliner if hasInstrSchedModel

[Jinsong Ji via Phabricator via llvm-commits]

jsji created this revision.
jsji added reviewers: PowerPC, hfinkel, shchenz, steven.zhang.
Herald added subscribers: llvm-commits, kbarton, hiraditya, nemanjai.
Herald added a project: LLVM.

P9 <https://reviews.llvm.org/P9> is the only one with InstrSchedModel, but we may have more in the
future, we should not hardcoded it to P9 <https://reviews.llvm.org/P9>, check hasInstrSchedModel
instead.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D83590

Files:
  llvm/lib/Target/PowerPC/PPCSubtarget.cpp
  llvm/test/CodeGen/PowerPC/sms-remark.ll


Index: llvm/test/CodeGen/PowerPC/sms-remark.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/sms-remark.ll
+++ llvm/test/CodeGen/PowerPC/sms-remark.ll
@@ -1,14 +1,19 @@
 ; RUN: llc < %s -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu \
 ; RUN:       -verify-machineinstrs -ppc-asm-full-reg-names -mcpu=pwr9 --ppc-enable-pipeliner \
 ; RUN:       -pass-remarks-analysis=pipeliner -pass-remarks=pipeliner -o /dev/null 2>&1 \
-; RUN:       | FileCheck %s
+; RUN:       | FileCheck %s --check-prefix=ENABLED
+; RUN: llc < %s -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu \
+; RUN:       -verify-machineinstrs -ppc-asm-full-reg-names -mcpu=pwr8 --ppc-enable-pipeliner \
+; RUN:       -pass-remarks-analysis=pipeliner -pass-remarks=pipeliner -o /dev/null 2>&1 \
+; RUN:       | FileCheck %s --allow-empty --check-prefix=DISABLED
 
 @x = dso_local local_unnamed_addr global <{ i32, i32, i32, i32, [1020 x i32] }> <{ i32 1, i32 2, i32 3, i32 4, [1020 x i32] zeroinitializer }>, align 4
 @y = dso_local global [1024 x i32] zeroinitializer, align 4
 
 define dso_local i32* @foo() local_unnamed_addr {
-;CHECK: Schedule found with Initiation Interval
-;CHECK: Pipelined succesfully!
+;ENABLED: Schedule found with Initiation Interval
+;ENABLED: Pipelined succesfully!
+;DISABLED-NOT: remark
 entry:
   %.pre = load i32, i32* getelementptr inbounds ([1024 x i32], [1024 x i32]* @y, i64 0, i64 0), align 4
   br label %for.body
Index: llvm/lib/Target/PowerPC/PPCSubtarget.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -180,7 +180,7 @@
 bool PPCSubtarget::enableMachineScheduler() const { return true; }
 
 bool PPCSubtarget::enableMachinePipeliner() const {
-  return (CPUDirective == PPC::DIR_PWR9) && EnableMachinePipeliner;
+  return getSchedModel().hasInstrSchedModel() && EnableMachinePipeliner;
 }
 
 bool PPCSubtarget::useDFAforSMS() const { return false; }


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