[PATCH] D83588: [TableGen][CGS] Print better errors on overlapping InstRW
Jon Roelofs via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 10 14:01:36 PDT 2020
jroelofs created this revision.
jroelofs added reviewers: thakis, evandro, dsanders.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D83588
Files:
llvm/utils/TableGen/CodeGenSchedule.cpp
Index: llvm/utils/TableGen/CodeGenSchedule.cpp
===================================================================
--- llvm/utils/TableGen/CodeGenSchedule.cpp
+++ llvm/utils/TableGen/CodeGenSchedule.cpp
@@ -1083,13 +1083,14 @@
if (RWD->getValueAsDef("SchedModel") == RWModelDef &&
RWModelDef->getValueAsBit("FullInstRWOverlapCheck")) {
assert(!InstDefs.empty()); // Checked at function start.
- PrintFatalError
+ PrintError
(InstRWDef->getLoc(),
"Overlapping InstRW definition for \"" +
InstDefs.front()->getName() +
"\" also matches previous \"" +
RWD->getValue("Instrs")->getValue()->getAsString() +
"\".");
+ PrintFatalError(RWD->getLoc(), "Previous match was here.");
}
}
LLVM_DEBUG(dbgs() << "InstRW: Reuse SC " << OldSCIdx << ":"
@@ -1118,13 +1119,14 @@
for (Record *OldRWDef : SchedClasses[OldSCIdx].InstRWs) {
if (OldRWDef->getValueAsDef("SchedModel") == RWModelDef) {
assert(!InstDefs.empty()); // Checked at function start.
- PrintFatalError
+ PrintError
(InstRWDef->getLoc(),
"Overlapping InstRW definition for \"" +
InstDefs.front()->getName() +
"\" also matches previous \"" +
OldRWDef->getValue("Instrs")->getValue()->getAsString() +
"\".");
+ PrintFatalError(OldRWDef->getLoc(), "Previous match was here.");
}
assert(OldRWDef != InstRWDef &&
"SchedClass has duplicate InstRW def");
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