[llvm] 02fec9d - [DAGCombiner] move/rename variables for readability; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 10 08:29:00 PDT 2020


Author: Sanjay Patel
Date: 2020-07-10T11:28:51-04:00
New Revision: 02fec9d2a5f4a6f169bcf2e850eb244fb919309f

URL: https://github.com/llvm/llvm-project/commit/02fec9d2a5f4a6f169bcf2e850eb244fb919309f
DIFF: https://github.com/llvm/llvm-project/commit/02fec9d2a5f4a6f169bcf2e850eb244fb919309f.diff

LOG: [DAGCombiner] move/rename variables for readability; NFC

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index effd5d6ab7d8..0d84cd89f5ae 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -16551,7 +16551,6 @@ bool DAGCombiner::tryStoreMergeOfLoads(SmallVectorImpl<MemOpLink> &StoreNodes,
     unsigned FirstStoreAS = FirstInChain->getAddressSpace();
     unsigned FirstStoreAlign = FirstInChain->getAlignment();
     LoadSDNode *FirstLoad = cast<LoadSDNode>(LoadNodes[0].MemNode);
-    unsigned FirstLoadAlign = FirstLoad->getAlignment();
 
     // Scan the memory operations on the chain and find the first
     // non-consecutive load memory address. These variables hold the index in
@@ -16565,10 +16564,10 @@ bool DAGCombiner::tryStoreMergeOfLoads(SmallVectorImpl<MemOpLink> &StoreNodes,
     bool isDereferenceable = true;
     bool DoIntegerTruncate = false;
     StartAddress = LoadNodes[0].OffsetFromBase;
-    SDValue FirstChain = FirstLoad->getChain();
+    SDValue LoadChain = FirstLoad->getChain();
     for (unsigned i = 1; i < LoadNodes.size(); ++i) {
       // All loads must share the same chain.
-      if (LoadNodes[i].MemNode->getChain() != FirstChain)
+      if (LoadNodes[i].MemNode->getChain() != LoadChain)
         break;
 
       int64_t CurrAddress = LoadNodes[i].OffsetFromBase;
@@ -16645,6 +16644,7 @@ bool DAGCombiner::tryStoreMergeOfLoads(SmallVectorImpl<MemOpLink> &StoreNodes,
     // the NumElem refers to array/index size.
     unsigned NumElem = std::min(NumConsecutiveStores, LastConsecutiveLoad + 1);
     NumElem = std::min(LastLegalType, NumElem);
+    unsigned FirstLoadAlign = FirstLoad->getAlignment();
 
     if (NumElem < 2) {
       // We know that candidate stores are in order and of correct


        


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